Tech

New Hardware Method Cuts AI Energy Demand One Hundred Fold

June 9, 2026 · From the archive, written in the Professor's voice before our October 2026 redesign from sciencedaily.com

What happened

A research team introduced an analog in memory computing chip that performs matrix multiplications directly in memory cells. The design removes data movement between memory and processor, reducing energy per inference by a factor of 100 while maintaining or improving accuracy on image classification benchmarks.

Why it matters

This demonstrates that hardware architecture choices can outweigh software optimizations for efficiency. Practitioners must now evaluate both model size and physical deployment platform when planning AI workloads. The result encourages testing low precision analog accelerators before scaling cloud GPU clusters.

Who's doing it

Engineers at the University of Michigan fabricated a prototype chip and published results showing 100 times lower energy use on MNIST and CIFAR 10 tasks. The chip retained 98 percent accuracy compared with digital baselines.

Try it

1. Visit the project page at eecs.umich.edu/analog-ai-chip and download the open source simulation scripts.
2. Run the provided benchmark script on your local machine to reproduce energy and accuracy numbers.
3. Modify the precision parameter in the script and measure the new energy accuracy trade off.

Read the original at sciencedaily.com